Students in the third or fourth year of their Sc. degree and M. Sc. degree students in Electronics, Informatics, Computer Science, Automatic, Telecommunications or Electrical engineering.
Project:
Circuit and physical design of analog circuit in 28nm CMOS technology
Description:
The candidate will perform circuit and physical design of analog circuit using Cadence Virtuoso framework. Candidate can choose the circuit that he/she will design, or the circuit will be provided by mentor. The goal is for the candidate to go through all the steps in the analog design and get familiar with circuit and physical design of analog circuits.
Main activities:
circuit design and simulations
creating layout and verifying that it is DRC/LVS clean
extracting layout and running LPE extracted simulations
improving the design to meet the specification
Prerequisites
Good knowledge in analog electronics
At least B level of English language (spoken and written)
Why to choose to work for HDL Design House:
Paid internship
No lock-in contract obligation
Working in young and enthusiastic team
Opportunity to work on projects for some of the best Semiconductor companies in the world
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